Enhanced functionality of computing devices is increasingly burdening their host processors and operating systems. To improve performance of computers, designers are off-loading related processes to coprocessors. Typically, such coprocessors govern high-level processes and manage the low-level processes performed by a device controller. For example, computer architectures for storage and network applications off-load input/output (“I/O”) processes to coprocessors commonly known as “I/O processors.” The I/O processor manages the low-level I/O processes performed by an I/O controller, such as a small computer system interface (“SCSI”) controller. To enable the I/O processor to service interrupts and exchange data with the I/O controller, specialized circuitry has been developed to support the interactions between I/O controllers and I/O processors. While functional, traditional approaches to establishing communications between coprocessors and device controllers have a variety of drawbacks, some of which are described next.
FIG. 1 depicts a computer device implementing specialized circuitry for facilitating data transfers between an I/O controller and an I/O processor. Computing device 100 includes a motherboard 110 and a function card 130. Specifically, motherboard 110 includes a host 102, an I/O controller 112, detection logic 114, redirection logic 116, hiding logic 118 and a slot 119. Function card 130 includes an I/O processor 132. Host 102 includes a host processor, such as a central processing unit (“CPU”), that is connected via dedicated interrupt line 104 to I/O controller 112. Dedicated interrupt line 104 provides a sideband signal, such as an interrupt signal from I/O controller 112, to host 102 when I/O controller 112 requires computational resources. The sideband signal is typically sent over a specialized sideband channel. Motherboard 110 contains detection logic 114, hiding logic 118 and redirection logic 116 as specialized circuitry to support the interactions between I/O controller 112 and I/O processor 132. Detection logic 114 detects the presence of function card 130 in slot 119. When function card 130 is present, hiding logic 118 isolates I/O controller 112 from host 102 so that the host 102 does not seize control over I/O controller 112. Thereafter, redirection logic 116 redirects interrupts from dedicated interrupt line 104 via a specialized sideband wire 120 to I/O processor 132. Note that I/O controller 112 is generally mounted directly onto motherboard 110.
A drawback to this approach is that motherboard 110 requires adaptation to include the above-described specialize circuitry and specialized sideband wire. These increase the amount of materials, costs and time necessary to manufacture motherboard 110, and make the motherboard non-standard. Further, the specialized circuitry and specialized sideband wire 120 are implemented in slot 119, thereby making the slot a non-standard slot. Non-standard slots restrict their uses to certain types of function cards 130, thereby reducing the number of general-purpose slots available to a user.
In view of the foregoing, it would be desirable to provide a system chipset, a computer device, an apparatus and a method that minimizes the above-mentioned drawbacks, thereby facilitating peer-to-peer communications between coprocessors and device controllers.